earticle

Characterization of the Vertical Position of the Trapped Charge in Charge-trap Flash Memory

Kim, Seunghyun, Kwon, Dae Woong, Lee, Sang-Ho, Park, Sang-Ku, Kim, Youngmin, Kim, Hyungmin, Kim, Young Goan, Cho, Seongjae, Park, Byung-Gook

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.167-173

CMOS Analog Integrate-and-fire Neuron Circuit for Driving Memristor based on RRAM

Kwon, Min-Woo, Baek, Myung-Hyun, Park, Jungjin, Kim, Hyungjin, Hwang, Sungmin, Park, Byung-Gook

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.174-179

A Study on Shear-stress Calibration by the Mid-point Measurements in +45/-45 Degree Semiconductor Resistor-pair

Cho, Chun-Hyung, Cha, Ho-Young, Sung, Hyuk-Kee

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.180-185

Implementation of an Integrated Pressure-sensor System Adapted to the Optimum Sensitivity

Hong, Sung-Hee, Cho, Chun-Hyung

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.186-191

Optimization of Double Gate Vertical Channel Tunneling Field Effect Transistor (DVTFET) with Dielectric Sidewall

WANG, XIANGYU, Cho, Wonhee, Baac, Hyoung Won, Seo, Dongsun, Cho, Il Hwan

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.192-198

Mutually-Actuated-Nano-Electromechanical (MA-NEM) Memory Switches for Scalability Improvement

Lee, Ho Moon, Choi, Woo Young

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.199-203

AlGaN/GaN-on-Si Power FET with Mo/Au Gate

Kim, Hyun-Seop, Jang, Won-Ho, Han, Sang-Woo, Kim, Hyungtak, Cho, Chun-Hyung, Oh, Jungwoo, Cha, Ho-Young

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.204-209

Implementation of Neuromorphic System with Si-based Floating-body Synaptic Transistors

Park, Jungjin, Kim, Hyungjin, Kwon, Min-Woo, Hwang, Sungmin, Baek, Myung-Hyun, Lee, Jeong-Jun, Jang, Taejin, Park, Byung-Gook

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.210-215

Si<SUB>1-xGe<SUB>x Positive Feedback Field-effect Transistor with Steep Subthreshold Swing for Low-voltage Operation

Hwang, Sungmin, Kim, Hyungjin, Kwon, Dae Woong, Lee, Jong-Ho, Park, Byung-Gook

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.216-222

Design and Analysis of AlGaN/GaN MIS HEMTs with a Dual-metal-gate Structure

Jang, Young In, Lee, Sang Hyuk, Seo, Jae Hwa, Yoon, Young Jun, Kwon, Ra Hee, Cho, Min Su, Kim, Bo Gyeong, Yoo, Gwan Min, Lee, Jung-Hee, Kang, In Man

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.223-229

InGaAs-based Tunneling Field-effect Transistor with Stacked Dual-metal Gate with PNPN Structure for High Performance

Kwon, Ra Hee, Lee, Sang Hyuk, Yoon, Young Jun, Seo, Jae Hwa, Jang, Young In, Cho, Min Su, Kim, Bo Gyeong, Lee, Jung-Hee, Kang, In Man

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.230-238

Experimental Investigation of Physical Mechanism for Asymmetrical Degradation in Amorphous InGaZnO Thin-film Transistors under Simultaneous Gate and Drain Bias Stresses

Jeong, Chan-Yong, Kim, Hee-Joong, Lee, Jeong-Hwan, Kwon, Hyuck-In

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.239-244

Investigation of Nb-Zr-O Thin Film using Sol-gel Coating

Kim, Joonam, Haga, Ken-ichi, Tokumitsu, Eisuke

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.245-251

Methodology for Extracting Trap Depth using Statistical RTS Noise Data of Capture and Emission Time Constant

Oh, Dong-Jun, Kwon, Sung-Kyu, Song, Hyeong-Sub, Kim, So-Yeong, Lee, Ga-Won, Lee, Hi-Deok

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.252-259

Process Variation on Arch-structured Gate Stacked Array 3-D NAND Flash Memory

Baek, Myung-Hyun, Kim, Do-Bin, Kim, Seunghyun, Lee, Sang-Ho, Park, Byung-Gook

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.260-264

Electrical Characteristics of SiO<SUB>2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO<SUB>2

Jo, Yoo Jin, Moon, Jeong Hyun, Seok, Ogyun, Bahng, Wook, Park, Tae Joo, Ha, Min-Woo

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.265-270

Triple-gate Tunnel FETs Encapsulated with an Epitaxial Layer for High Current Drivability

Lee, Jang Woo, Choi, Woo Young

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.271-276

A Study on Thermal Stability Improvement in Ni Germanide/p-Ge using Co interlayer for Ge MOSFETs

Shin, Geon-Ho, Kim, Jeyoung, Li, Meng, Lee, Jeongchan, Lee, Ga-Won, Oh, Jungwoo, Lee, Hi-Deok

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.277-282

Contact Resistance Reduction between Ni-InGaAs and n-InGaAs via Rapid Thermal Annealing in Hydrogen Atmosphere

Lee, Jeongchan, Li, Meng, Kim, Jeyoung, Shin, Geonho, Lee, Ga-won, Oh, Jungwoo, Lee, Hi-Deok

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.283-287

Transient Simulation of Graphene Sheets using a Deterministic Boltzmann Equation Solver

Hong, Sung-Min

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.288-293

A Reconfigurable 4<SUP>th Order ΣΔ Modulator with a KT/C Noise Reduction Circuit

Yang, Su-Hun, Seong, Jae-Hyeon, Yoon, Kwang-Sub

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.294-301

Novel Pass-transistor Logic based Ultralow Power Variation Resilient CMOS Full Adder

Guduri, Manisha, Islam, Aminul

[Kisti 연계] 대한전자공학회 Journal of semiconductor technology and science Vol.17 No.2 2017 pp.302-317