원문정보
Design of High Efficiency Power Amplifier Using Adaptive Bias Technique and DGS
초록
영어
In this paper, the high efficiency and linearity Doherty power amplifier using DGS and adaptive bias technique has been designed and realized for 2.3GHz WiBro applications. The Doherty amplifier has been implemented using silicon MRF 281 LDMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with DGS and adaptive bias technique has been 36.6% at 34.01dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.
목차
I. 서론
Ⅱ. 적응형 바이어스와 DGS 를 이용한 도허티전력 증폭기 설계
2-1 도허티 전력 증폭기 이론
2-2 바이어스 적응제어 회로 설계
2-3 DGS 설계
Ⅲ. 제작 및 측정결과
3-1 DGS 가 부가된 Doherty 전력 증폭기 제작
Ⅳ. 결론
참고문헌
