원문정보
한국차세대컴퓨팅학회
한국차세대컴퓨팅학회 학술대회
The 9th International Conference on Next Generation Computing 2023
2023.12
pp.27-28
피인용수 : 0건 (자료제공 : 네이버학술정보)
초록
영어
This paper proposes a binarized neural network (BNN) processor supporting residual networks. The processor was fabricated in UMC 40-nm CMOS technology. Test results show that performance and energy efficiency are 1036.8 GOPS, and 66.5 GOPS/mW at 200MHz, respectively.
목차
Abstract
I. INTRODUCTION
II. PROPOSED BINARIZED RESNETE DATA FLOW
III. PROPOSED BNN ARCHITECTURE
IV. IMPLEMENTATION AND RESULTS
V. CONCLUSION
ACKNOWLEDGMENT
REFERENCES
I. INTRODUCTION
II. PROPOSED BINARIZED RESNETE DATA FLOW
III. PROPOSED BNN ARCHITECTURE
IV. IMPLEMENTATION AND RESULTS
V. CONCLUSION
ACKNOWLEDGMENT
REFERENCES
저자정보
참고문헌
자료제공 : 네이버학술정보
