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Poster Session IV

An FPGA Implementation of Quantized CNN Hardware for IoT Devices

초록

영어

Due to the recent improvement in the computational power of hardware and the growth of data, a deep learning-based approach that optimizes parameters using massive data showed excellent performance. In computer vision, research using a convolutional neural network(CNN) is being actively conducted. However, it is challenging to apply to IoT devices due to the high computational complexity and massive memory usage required. In this paper, we propose a quantized CNN hardware for IoT devices that optimized memory usage and computation complexity. In addition, we present a quantization framework for the proposed hardware design. The presented framework includes floating-point training, quantization, fully integer arithmetic inference, and hardware design processes. As a result of implementing the quantized CNN on the Xilinx ZC702 evaluation board, power consumption and inference speed improved by 4.86× and 2.58×, respectively, compared to 32-bit floating-point hardware.

목차

Abstract
I. INTRODUCTION
II. PROPOSED QUANTIZED CNN HARDWARE
A. Framework Overview
B. Quantization
C. Fully Integer Arithmetic Inference
D. Hardware Architecture
III. EXPERIMENT RESULTS
IV. CONCLUSION AND FUTURE WORK
ACKNOWLEDGMENT
REFERENCES

저자정보

  • Jaemyung Kim dept. Electrical Computer Engineering Inha University
  • Yongwoo Kim dept. System Semiconductor Engineering Sangmyung University
  • Jin-Ku Kang dept. Electrical Computer Engineering Inha University

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