원문정보
초록
영어
With the development of embedded technology, the embedded image processing algorithms are becoming more and more complex. Edge detection is the basic algorithm of image processing, which is used in the extraction of information from the image. Laplacian operator is useful for the edge detection. Especially, the operator can be determined by the zero crossing point of the two differential positive and negative peaks. In order to meet the fast hardware implementation of embedded image processing, this paper presents the hardware acceleration of Laplacian operator by Zynq-7000. Using HLS method, the complex image algorithm is automatically translated into hardware language, and the function of the algorithm can be quickly completed. The experimental results show that, the embedded hardware accelerated image based on Zynq-7000 can not only realize software programming and hardware programmable combination, but also improve the embedded system flexibility, scalability, and accelerate embedded image processing product design time.
목차
1. Introduction
2. Introduction of Zynq-7000 All Programmable SoC
3. Edge Detection
4. Edge Detection Algorithm Hardware Accelerator via Zynq-7000
4.1. Laplacian Operator by HLS Description
4.2. Laplacian Operator Verification by HLS Description
5. Conclusion
References