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논문검색

Design of Low Hardware Complexity Multiplexer Using NAND Gates on Quantum-Dot Cellular Automata

초록

영어

This paper presents a 2-to-1 multiplexer based on quantum-dot cellular automata(QCA) with low hardware complexity. A QCA is the computing with cellular automata composed of arrays of quantum-dot devices. We propose a novel 2-to-1 multiplexer using three NAND gates in QCA. We focus on reducing a hardware complexity and minimizing a wasted cell. In order to the implementation of the 2-to-1 multiplexer, we use a new equation using De Morgan’s law. Our new architecture also can increase the speed with clock phase.

목차

Abstract
 1. Introduction
 2. Related Work
  2.1. QCA Basic
  2.2. Multiplexer
 3. Previous Design
 4. Proposed Design and Analysis
 5. Conclusion
 References

저자정보

  • Jin-Seong Lee Department of Computer Engineering at Kumoh National Institute of Technology, Gumi, Korea
  • Jun-Cheol Jeon Department of Computer Engineering at Kumoh National Institute of Technology, Gumi, Korea

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