원문정보
초록
영어
LTE-A system, the UE and the eNodeB cell synchronization process is very important, it can detect the physical layer cell ID and access to time and frequency synchronization, and then process data communication. The key to cell synchronization is to acquire the cell ID. The ID of the cell can be obtained by ID blind detection, and the cell system information can be obtained. Therefore, it is very important to get the cell ID quickly and accurately. With the constant updating of the protocol, the design of the user's receiving end is also constantly updated. This paper proposes a reasonable and feasible ASIC design scheme and valid UVM (Universal Verification Methodology) verification platform from the perspective of studying the cell ID blind detection algorithm as well hardware implementation by balancing the fast accuracy of data operation with hardware cost, area and power consumption, it has important practical significance. Compared with the same module of other design, ASIC design of this area is 8.8% lower, 9.3% lower power consumption than the other design.
목차
1. Introduction
2. Related Algorithms Research
2.1 PSS Coarse Synchronization
2.2 PSS Fine Synchronization
2.3 SSS Detections
3. ASIC Design and Implementation
3.1 Functional Structure
3.2 Hardware Implementation Process
3.3 RTL Code to Achieve Results
4. UVM Simulation Verification
4.1 Simulation and Verification Results
4.2 Simulation Results Analysis
4.3. Logic Synthesis
5. Conclusion
References