원문정보
초록
영어
A new topology of high gain DC-DC quadratic boost converter with voltage multiplier cell (VMC) is introduced in this paper. The proposed VMC technique is derived from the traditional quadratic boost converter, which has an advantage with high voltage gain and stress across the semiconductor devices are lower than the output voltage. To validate efficacy of the proposed method simulation has been performed in Mat lab Simulink software to compare the voltage gain of proposed method with others five modified boost converters. The input voltage of proposed converter and other topologies are same 10VDC but the output voltage of proposed converter is much higher than others converters which are discussed in this paper.
목차
1. Introduction
2. Traditional Boost Converter
3. A Boost Converter with Voltage Extension Cell
4. Boost Converter with Voltage-Lift Cell
5. Traditional Quadratic Boost Converter
6. Three-level Quadratic Boost Converter
7. Proposed Topology
7.1. Working Principle of the Proposed Converter
7.2. State-I:
7.3. State-II:
7.4. Steady State Analysis of the Proposed Converter
7.5. DC Conversion Ratio
7.6. Voltage Stress Across the Semiconductor Devices
7.7. Simulation Results and Discussion
8. Conclusion
References
