earticle

영어

Many of fuzzy control applications require real-time operation; higher density programmable logic devices such as field programmable gate array (FPGA) can be used to integrate large amounts of logic in a single IC. This work, proposes a developed method to fuzzifier algorithm with optimal-tunable gains method-using FPGA. The maximum frequency in FPGA-based design is about 72.4 MHz and the delay time in this design is about 13.78 ns. It is observed that this algorithm is able to make as a fast response at 13.78 clock period with 72.4 of a maximum frequency and 2.1 ns for minimum input arrival time after clock. From investigation and synthesis summary, 24.3 for maximum input arrival time after clock with 13.9 MHZ frequencies, this design has 13.78 ns delays for each controller to 46 logic elements and the offset before CLOCK is 82.1 ns.