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논문검색

Artificial Bee Colony and Neural Networks Optimization Test Generation Algorithm for Multiple Faults of Digital Circuits

목차

Abstract
 1. Introduction
 2. The Equivalent Transformation of Multiple Stuck-at Faults and Single Stuck-at Fault
 3. Neural Network Model for Single Stuck-at Fault
 4. Algorithm’s Realization
  4.1. Simplify the Energy Function of Constraint Circuit
  4.2. Solving the Zero Value of Energy Function with Artificial Bee Colony Algorithm
 5. Experiment Results
 6. Conclusion
 Acknowledgements 
 References

저자정보

  • Zhao Ying Electical & information Engineering College, Beihua University, Jilin, China
  • Liu Bai-sheng Electical & information Engineering College, Beihua University, Jilin, China
  • Li Yan-juan College of Information and Computer Engineering, Northeast Forestry University, Harbin, China

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