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This research work emphasizes on the design of the wireless LAN specific UART. The frequencies that are standardized for the wireless LANs have been analyzed by scaling the voltage. The aim is to find out the most energy efficient specifications for the UART. After all the calculations, deduction comes over to a point that increasing the voltages increases the power consumption and therefore, the wastage gets elevated too. However, at lower values there is lesser wastage of power and hence the efficiency increases. Virtex-4 FPGA and WLAN standards have been focused upon to make the UART design. Xilinx software as well as the Verilog Hardware Description Language have been used for the purpose. The power consumption swings between 16% to 95.59% for different values of voltages at the specified WLAN frequencies. Various power loss parameters have been studied to get the most optimum operating condition for the UART.