원문정보
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초록
영어
The current LTE-Advanced system architecture tends to flatten and the data transfer rate of mobile communication system continues to increase, which needs to complete cell blind detect more accurate and quick, and indicates that the design of the LTE-A system terminal need to be updated. Therefore, this paper will find a new cell blind detect scheme, then designing a corresponding IP which considers the hardware performance, area, power and scalability from the perspective of ASIC implementation, and using ASIC tools to verification and logic synthesis. Implementation results show that the designed IP can be used for a mobile terminal chip design.
목차
Abstract
1. Introduction
2. Related Algorithms
2.1. Coarse Timing Synchronization and sub cell ID Detection
2.2. Fine Timing Synchronization
2.3. Frame Synchronization and Cell Group ID Detection
2.4. Algorithm Summary
3. IP Design
3.1. Structure Description
3.2. Calculation Module
3.3. Control Module
4. Experiments and Analysis
4.1. Functional Verification
4.2. Logic Synthesis
5. Conclusions
References
1. Introduction
2. Related Algorithms
2.1. Coarse Timing Synchronization and sub cell ID Detection
2.2. Fine Timing Synchronization
2.3. Frame Synchronization and Cell Group ID Detection
2.4. Algorithm Summary
3. IP Design
3.1. Structure Description
3.2. Calculation Module
3.3. Control Module
4. Experiments and Analysis
4.1. Functional Verification
4.2. Logic Synthesis
5. Conclusions
References
저자정보
참고문헌
자료제공 : 네이버학술정보