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논문검색

Voltage Based Energy Efficient Mobile Charge Sensor Design Using LVCMOS

원문정보

초록

영어

In this paper an approach is made to design the voltage based energy efficient mobile charge sensor design and for that reason we have used LVCMOS IO standards. Power dissipation is the major factor that has been analyzed and focused .Voltage sensor is operating at different frequencies and at fix temperature that is 25 degree Celsius. Frequencies of different mobile phones have been evaluated. Frequencies taken in consideration are 1400MHz for Nokia Lumia710, 1.2 GHz for Samsung Galaxy core, 2100 MHz for iphone6, 1700 MHz for HTC/T, 1800 MHz for micromax X091 and 2.2GHz for Song Xperia Z1. This research work, is basically done to check the charging status of a mobile phone. The coding is done in Verilog on 28nm FPGA that is Kintex-7. Kintex7 is 28-nm FPGA on which we implement our circuit to re-assure power reduction and reduction in junction temperature in sequential circuit.There is 4-19% reduction in power dissipation with LVCMOS33, 3-15% reduction in power dissipation with LVCMOS25, 2-13% reduction in power dissipation with LVCMOS18, 2-12% reduction in power dissipation with LVCMOS15, 1-5% reduction in power dissipation with BLVDS25 at 25 degree Celsius when we use 28nm FPGA. The performance of our sensor is evaluated and tested through simulations on Xilinx software development kit. . The quality of our sensor can be improved by changing IO standards.

목차

Abstract
 1. Introduction
 2. Power Analysis
  A. IO Power Analysis on 28nm FPGA for LVCMOS33
  B. IO Power Analysis on 28nm FPGA for LVCMOS25
  C. IO Power Analysis on 28nm FPGA for LVCMOS18
  D. IO Power Analysis on 28nm FPGA for LVCMOS15
  E. IO Power Analysis on 28nm FPGA for BLVDS25
  F. IO Power Analysis on 28nm FPGA for Different IO STANDARDS
 3. Conclusion
 4. Future Scope
 References

저자정보

  • Arpit Gupta Department of CSE, Chitkara University, Punjab, India
  • Aarushi Sapra Department of CSE, Chitkara University, Punjab, India

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