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Research on the Optimization of the Performance of CTL Loop Discriminator

초록

영어

Chip Tracking Loop (CTL) is the key to ensure the accuracy of regenerative pseudo-noise ranging in the deep space measurement and control communication system. However, due to the impact of the code imbalance, clock attenuation rate and noise, the loop locking time of CTL is prolonged and the ranging accuracy is degraded. In this paper, we proposed the discriminator optimization algorithm to address this problem. This algorithm is based on the loop discrimination performance of clock code and composite code, and the impact of the noise on the discrimination performance. In order to improve the tracking accuracy and shorten the loop locking time, this algorithm corrected the curve of discriminator’s gain by compensating discriminator’s gain. Both the theory analysis and simulation results illustrate that the algorithm can correct the discriminator’s gain curve, reduce the loop locking time and ensure the significant tracking accuracy in low SNR.

목차

Abstract
 1. Introduction
 2. Discriminator Characteristics of CTL
 3. Performance Optimization of CTL Discriminator
  3.1. Discrimination Performance of Clock Code and Composite Code
  3.2. Impact of Noise on the Discrimination Performance
  3.3. Optimization and Simulation Analysis of Discriminator
 4. Conclusions
 Acknowledgments
 References

저자정보

  • Xu Ying Academy of Opto-Electronics, Chinese Academy of Science, Beijing, 100094, China
  • Yuan Hong Academy of Opto-Electronics, Chinese Academy of Science, Beijing, 100094, China
  • Luo Ruidan Academy of Opto-Electronics, Chinese Academy of Science, Beijing, 100094, China, University of Chinese Academy of Sciences, Beijing 100049, China
  • Xu Duo Beijing Institute of Technology, Beijing, 100081, China

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