원문정보
보안공학연구지원센터(IJHIT)
International Journal of Hybrid Information Technology
Vol.8 No.8
2015.08
pp.367-372
피인용수 : 0건 (자료제공 : 네이버학술정보)
초록
영어
In this paper an existing seven transistor (7T) CMOS SRAM cell stability is measured. N-curve method is used to find the stability of the cell. The stability parameters i.e. Static Voltage Noise Margin (SVNM), Static Current Noise Margin (SINM), Write Trip Voltage (WTV) and Write Trip Current (WTI) are measured by varying temperature and supply voltage. The existing cell has an inbuilt mechanism for charge sharing. This technique .for the write operation. The existing 7T SRAM cell has achieved 22.71% increase in stability as compared to reference cell, which validate the desired design approach.
목차
Abstract
1. Introduction
2. Present Architectures
2.1. Conventional SRAM cell [7]–[10]
2.2. Other Existing 7T SRAM cell [9], [10]
3. Stability Metrics using n-curve [11]–[17]
4. Existing 7T SRAM Cell
5. Analysis and Simulation Work
6. Conclusion
References
1. Introduction
2. Present Architectures
2.1. Conventional SRAM cell [7]–[10]
2.2. Other Existing 7T SRAM cell [9], [10]
3. Stability Metrics using n-curve [11]–[17]
4. Existing 7T SRAM Cell
5. Analysis and Simulation Work
6. Conclusion
References
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저자정보
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자료제공 : 네이버학술정보