원문정보
초록
영어
A study of a fractal structure of a clock generator and distributor is performed with possible use in today’s ultra-high-speed, GHz range or higher, integrated circuit design and other future digital system applications. A fractal cell is composed of a simple ring oscillator with three inverting amplifiers, configuring a triangle shape, with an inverting amplifier placed at each side. Each side is then shared with an adjacent cell, which makes this fractal structure that is, theoretically, spreadable infinitely in 2D domain. This fractal structure is proved to have insensitivities to supply voltage and temperature variations: less than 1% of clocks skew of a clock period, with given 3% of supply voltage or 5% of temperature fluctuations. This is because any local disturbances or gradients will instantly and evenly be distributed to the whole networks yielding a global averaged state change. SPICE simulations are done with 0.5μm, 3V, N-Well CMOS process technology in order to prove the validity of the idea. A simple fractal CMOS layout, with 108 inverters, is also performed and included for future chip measurement.
목차
1. Introduction
2. Structure of Fractal Cellular Oscillator Networks
3. CMOS Oscillator Network with an Inverter for Each Branch
4. Clock Skew Simulation Results of Fractal Cellular Oscillator Network
5. Simulation Results with Power Supply Voltage/Temperature Gradients
5.1. Clock Skew Simulation with Supply Voltage Gradient
5.2. Clock Skew Simulation with Temperature Gradient
6. CMOS Layout
7. Conclusions
Acknowledgements
References