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The Hardware Circuit Design, Generation, Download and Tests of Chaotic Sequence Model

초록

영어

In the field of information security, chaos algorithm and its application in hardware encryption have important significance. The paper here takes a normally used Lorenz chaotic system as an example and introduces its FPGA hardware circuit design; generation and download method, then, statistical tests and instrument test are done. Through the test, it is demonstrated that the chaotic sequence generated by the circuit has good statistical properties and chaotic characteristics. By this way, researchers can easily and quickly get and test chaotic sequences in experimental environment.

목차

Abstract
 1. Introduction
 2. Chaotic Sequence Model and Quantization
  2.1. Chaotic Sequence Model
  2.2. Quantization of Chaotic Sequence
 3. Chaotic Sequence Circuit Design
  3.1 Chaotic Sequence Model
  3.2 Matlab Simulation Circuit of Chaotic Sequence
 4. Chaotic Sequence Hardware Download and Generation
 5. Chaotic Sequence Tests
  5.1 Statistical Tests of Chaotic Sequence
  5.2 Instrument Test of Chaotic Sequence
 6. Conclusion
 7. Acknowledgements
 8. References
  8.1 Journal Article
  8.2 Book
  8.3 Conference Proceedings

저자정보

  • Lina Din Suihua University
  • Qi Chen Harbin COSLIGHT Electrical Automation Co.Ltd.
  • Qun Ding Heilongjiang University

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