원문정보
초록
영어
As we all know, Network communication is essential in network transmission, while the transmission delay of Ethernet’s MAC (Media Access Control) layer will affect the quality of communication networks with the continuous progress and development of Ethernet technology. In this paper, we design and implement the correct receiving and sending of Ethernet MAC protocol layer’s packets with FPGA, through the in-depth analysis of Ethernet MAC packets transceiver. The simulation results of the transceiver module system level were given through the simulation test plat form we built, which shows that Ethernet MAC layer’s packets designed on the FPGA-based platform can receive and send faster, and the low system occupancy rate can meet the requirements of system throughput for real-time communication environment system, which can provide the technical support for the development of Gigabit Ethernet.
목차
1. Introduction
2. Design of the Packets Transceiver of Ethernet MAC protocol Layer Based on FPGA
2.1. Design of the Data Reception Module Based on FPGA
2.2. Design of the Data Transmission Module Based on FPGA
2.3. Design of the Control Management Module Based on FPGA
3. System Simulation and Test
3.1. Initialization Test
3.2. Transmission Data Packets Test
3.3. Reception Data Packets Test
4. Summary
References