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논문검색

Register Allocation for QEMU Dynamic Binary Translation Systems

초록

영어

Binary translation is an important step to solve the code migration, QEMU is more advanced and efficient binary translation system. It uses lighter TCG technology to achieve dynamic binary translation but analysis of the TCG internal process, we found that the excessive use of temporary variables meaningless in the TCG intermediate code, the backend generates host code does not take into account the efficient use of registers. Through these two aspects of improvement, especially increased a linear scan register allocation algorithm in the back-end, can be in an acceptable translation time, generates efficient host code. The experimental results show that the optimized program run time significantly reduced and the amount of generated host code reduced by an average of 8%.

목차

Abstract
 1. Introduction
 2. About QEMU Translation System
 3. TCG Translation Problem Analysis
  3.1. A Problem in the TCG
  3.2. Choice of Register Allocation Strategy
 4. Front End Redundant Code Eliminate
  4.1. TCG Redundant Code Analysis
  4.2. TCG Redundant Code Elimination
 5. Design and Implementation of the Backend Register Allocation Algorithm
  5.1. Register Allocation Algorithm
  5.2. Overflow Algorithm Implementation
  5.3. The Experimental Results
 6. Concluding Remarks
 7. Acknowledgment
 8. References
  8.1. Journal Article

저자정보

  • Yi Liang College of Information Science and Engineering, Guangxi University for Nationalities, 530006, China
  • Yuanhua Shao School of Computer Science and Engineering, University of Electronic and Technology of China, Chengdu, 611731, China
  • Guowu Yang School of Computer Science and Engineering, University of Electronic and Technology of China, Chengdu, 611731, China
  • Jinzhao Wu Guangxi Key Laboratory of Hybrid Computation and IC Design Analysis, Guangxi University for Nationalities, 530006, China

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