원문정보
보안공학연구지원센터(IJUNESST)
International Journal of u- and e- Service, Science and Technology
Vol.7 No.5
2014.10
pp.79-86
피인용수 : 0건 (자료제공 : 네이버학술정보)
초록
영어
This paper present the development of a SPICE SiC JFET model and its corresponding characterization process. The device under study is a 1.3 kV, 15 A SiC JFET prototype manufactured by SiCED, packaged in a TO-220 case. The static and dynamic behavior of the SiC power JFET is simulated and compared to the measured data to show the accuracy of the Spice model. The switching characteristics have been tested on a double pulse tester under multiple conditions. A similar double pulse test circuit with parasitics in consideration has been simulated in Spice with the MOSFET model, which gave good results.
목차
Abstract
1. Introduction
2. SiC JFET Structure
3. SPICE SiC JFET Model
4. Characterizations of SiC JFET and Model Parameter Extractions
4.1. Static I-V Characteristics
4.2. Body Diode Characteristics
5. Model Verifications
6. Conclusions
References
1. Introduction
2. SiC JFET Structure
3. SPICE SiC JFET Model
4. Characterizations of SiC JFET and Model Parameter Extractions
4.1. Static I-V Characteristics
4.2. Body Diode Characteristics
5. Model Verifications
6. Conclusions
References
저자정보
참고문헌
자료제공 : 네이버학술정보