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논문검색

Charge Pump Circuit Design for a Low Input Voltage

초록

영어

In this paper, it is a proposal for a charge pump circuit design techniques for boosting the low voltage obtained from energy harvest techniques such as thermoelectric elements. In order to boost the low voltage, it did attempt to minimize the impact of high on-resistance and Clock-Feedthrough. CMOS switch was used, and was controlled not to occur the overlap during operation of the circuit. Charge pump circuit was designed for 4-stage as the condition for boosting low voltage. The simulation result shows, Cn=0.4pF, Cn+1=0.3pF, Cn+2=0.2pF, Cn+3=0.1pF and when load Capacitor was designed by 10pF, 0.3V input voltage became 1.4V about five times by boosting.

목차

Abstract
 1. Introduction
 2. Problems and Solutions of Charge Pump Circuit Operation for Low Voltage Input
  2.1. Concept and Solution for Overlap by Switch Timing
  2.2. Concept and Solution of Clock-Feedthrough
  2.3. The Concept and Solution of High On-resistance
 3. Proposed Charge Pump Circuit Design
 4. Conclusion
 Acknowledgements
 References

저자정보

  • Sung-Dae Yeo Seoul National University of Science & Technology, Seoul, Korea
  • Young-Jin Jang Seoul National University of Science & Technology, Seoul, Korea
  • Kyoung-Kun Lee Intelligence and Robot Research Team, ETRI
  • Seong-Jong Kim Mokpo National Maritime University, Korea
  • Seong-Kweon Kim Seoul National University of Science & Technology, Seoul, Korea

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