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논문검색

Veri cation of Embedded Real-Time Systems Using Symbolic Model Checking : A Case Study

초록

영어

This paper presents a case study for symbolic model checking (SMC) with Propositional Projection Temporal Logic (PPTL). First, PPTL is briefly introduced. Then an outline of symbolic model checking algorithm for PPTL proposed in [21] is presented. As a case study, a single-track railroad crossing control system (STRCCS) is employed to illustrate how SMC for PPTL can be utilized in the specification and verification of embedded real-time systems.

목차

Abstract
 1. Introduction
 2. Preliminaries
  2.1 Propositional Projection Temporal Logic
  2.2 Normal Form of PPTL
  2.3 Labeled Normal Form Graph
 3. Symbolic Model Checking for PPTL
 4. A Case Study
 5. Related Work
 6. Conclusion
 7. ACKNOWLEDGEMENTS
 References

저자정보

  • Tao Pang ICTT and ISN Lab, Xidian University, Xi'an 710071, P.R. China
  • Zhenhua Duan ICTT and ISN Lab, Xidian University, Xi'an 710071, P.R. China
  • Xiaofang Liu ICTT and ISN Lab, Xidian University, Xi'an 710071, P.R. China

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