earticle

영어

We present an area-efficient dynamic fault-handling approach to achieve high survivability for DSP circuits. Fault detection, isolation, and recovery are performed using discrepancy information derived from the existing functional throughput by reconfiguring one of the N + 1 Reconfigurable Partitions (RPs) to replicate each of the N modules in succession. This differs significantly from the conventional approaches that heavily rely on static temporal/spatial redundancy and sophisticated error prediction/estimation techniques. The principal space complexity metric is the additional physical resources utilized to support the underlying fault-handling mechanism where a single RP can check the health of multiple distinct functional blocks, by leveraging the property of dynamic partial reconfiguration. We demonstrate this approach by implementing a video encoder’s DCT block with a Xilinx Virtex-4 device and also numerically simulating a Canny Edge Detector.