원문정보
초록
영어
A manycore processor architecture integrating multiple cores onto a single die has been widely used in almost all computer systems and academia and industry have worked on the architecture for high-performance and low-power implementation. The manycore architectures have been proposed and designed for overcoming diminishing return and for efficiently utilizing the exponentially increasing number of transistors available in nano-meter technology. Although the architecture has been investigated extensively, under the process variation that is now considered as a critical design problem in the nano-meter technology, performance characteristics and benefits of the manycore architecture are not well studied. In this paper, we develop an asymptotic analysis model for better understanding the performance characteristics of manycore processor architectures using Amdahl’s law under process variation in order to foresee their performance impact for a given workload characteristics (e.g. available parallelism). Through the asymptotic analysis based on the models proposed in this paper, we can make the architectural design decisions such as "the number of cores" and "core size", and further we can probe the possible research direction of optimizing the performance of manycore architectures at the future of high process variation era.
목차
1. Introduction
2. Preliminary and Related Work
2.1. Amdahl's Law
2.2. Process Variation
2.3. Core Dependent Clock Frequency
3. Optimal Core Configuration under Process Variation
3.1. Process Variation Model
3.2. Performance Trends under Process Variation
3.3. Optimizing Core Partitioning Under Process Variation
4. Conclusion
Acknowledgements
References