원문정보
A New Abnormal Yields Detection Methodology in the Semiconductor Manufacturing Process
초록
영어
To prevent low yields in the semiconductor industry is crucial to the success of that industry. However, to prevent low yields is difficult because of too many factors to affect yield variation and their complex relation in the semiconductor manufacturing process. This study presents a new efficient detection methodology for detecting abnormal yields including high and low yields, which can forecast the yield level of a production unit (namely a lot) based on yield-related feature variables" behaviors. In the methodology, we use C5.0 to identify the yield-related feature variables that are the combination of correlated process variables associated with yield, use SOM (Self-Organizing Map) neural networks to extract and classify significant patterns of past abnormal yield lots and finally use C5.0 to generate classification rules for detecting abnormal yield lot. We illustrate the effectiveness of our methodology using a semiconductor manufacturing company’s field data.
목차
1. 서론
2. 관련 연구
2.1 반도체 제조공정과 수율관리
2.2 SOM과 C5.0
3. 수율 특성변수 기반의 이상수율 Lot 검출
3.1 수율 특성변수 정의
3.2 수율 특성변수 기반 Lot 패턴 분류
3.3 수율 특성변수 기반 이상수율Lot 검출 Rule 추출
3.4 수율 특성변수 기반의 이상수율 검출 Rule 적용
4. 실험적 연구
4.1 수율 특성변수 정의
4.2 수율 특성변수 기반 Lot 패턴 분류
4.3 이상수율 Lot 검출을 위한 수율 특성변수 Rule 추출
4.4 이상수율 Lot 검출 성능 평가
5. 결론
참고문헌
