earticle

영어

In this paper, we propose H/W configuration of high speed open architecture and analysis of JPEG2000 architecture for real-time image processing in mass storage infrared (IR) and charge coupled device (CCD) images. An open H/W architecture has the advantages, such as easy transplantation of H/W and S/W, support of compatibility and scalability for specification of current and previous versions, common module design using standardized design, and convenience of management and maintenance.
Therefore, the main purpose of this design is to propose a method for selecting the most suitable commercial-off-the-shelf (COTS) board. We also suggest an architecture design of high speed processing for real-time implementation of JPEG2000 from it.
The proposed design of optimum open H/W architecture consists of four conditions: (ⅰ) structuralize for design of open H/W architecture from analysis of requirement, (ⅱ) define for internal and external interfaces in it, (ⅲ) design for memory of digital signal processor (DSP) and field programmable gate array (FPGA), and (ⅳ) analysis for a mounted high speed processing of JPEG2000.
We simulated control of tiling and fixed number of compressed coefficient for a mounted high speed processing of JPEG2000. In the experiment, the proposed method showed very efficient compression in IR and CCD images.